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Monday, 6 April 2015

CS 2304/ OS 541 CS 1304 A/.10144 GS 505 - SYSTEM SOFTWARE

Question Paper Code : 51349
B.E. / B.Tech. DEGREE EXAMINATION, MAY/JUNE 2014.
Fifth Semester
Computer Science and Engineering
CS 2304/ OS 541 CS 1304 A/.10144 GS 505 - SYSTEM SOFTWARE
(Common to Information Technology)
(Regulation 2008/2010)
(Common to PTCS 2304-System Software for B.E.(Part-Time) Fourth Semester CSE-Regulation 2009)
Time: Three hours                                                                  Maximum : 100 marks
Answer ALL questions.
PART A - (10 x 2 = 20 marks)

1. Distinguish between system software and application software.
2. Write the sequence of instructions for SIC to set ALPHA equal to integer portion of BETAlGAMMA. Assume that ALPHA and :BETA are RESW 1.
3. Define program relocation:
4. Give the use of literal pool.
5. When is art absolute loader useful?
G. List the record types lased in MScl)OS linker.
7. What is macro-time variable? Giveits puspose.
8. Give the features of ANSI C macro.
9. What are the advantages of debuggers?
10.Give the significance of user interface.
PART – B (5 X 16 = 80 marks)
11. (a) Illustrate the comparison between SIC and SIC/XE Machine Architecture.
Or
    (b) Explain the instruction set and addressing modes supported by SIC/XE.

12. (a) Describe the data structures and algorithms of a two pass assembler.
Or
    (b) (i) Explain the Machine independent features of an assembler. (12)
        (ii)Give the flow for a simple one pass load and go assembler. (4)

13. (a) Describe the data structures and algorithms for a linking loader.
Or
    (b) (i) How can you load and call subroutines using dynamic linking? (8)
        (ii) Explain the differences between linking loader and linkage editor. (8)

14. (a) Illustrate the data structures and algorithms used for designing a two pass macro processor.
Or
    (b) Describe the following:
        (i) Conditional macro expansion (8)
        (ii)Recursive macro expansion (8)
15. (a) (i) Describe the structure of an editor. (12)
        (ii) List out the steps involved in the document editing process (4)
Or
    (b) Explain how the interactive debugging systems provide the testing and debugging to the programmers.

CS 2354/CS 64/10144 CS 604 - ADV AN CED COMPUTER ARCHITECTURE

Question Paper Code:  21315

B.E./B.Tech.   DEGREE EXAMINATION,  MAY/JUNE  2013.

COMPUTER SCIENCE AND ENGINEERING

CS 2354/CS  64/10144  CS 604 -·ADV AN CED COMPUTER  ARCHITECTURE 

 (Regulation   2008/2010) SIXTH SEMESTER
Time  :  Three  hours                                   Maximum:   100.marks



1.       Define  Dynamic scheduling.


2.       List  the five levels of branch  prediction.


3.       Define loop -  carried  dependence.


4.      What  is major  disadvantages of supporting speculation  Hardware.


5.      What  arc the disadvantages  of using  symmetric shared  memory?


6.        What  is consistency?


7.       What  is cache  miss  and  cache  hit?


8.       What  is the bus  master?


9.      What  are  the categories of multiprocessors?             ..
10.     What  is fine grained  multithreading? 

PART B-(5x16      = 80 marks)

11.    (a)     What  is instruction-level parallelism? Explain  in detail  about  the various
dependences caused   in ILP.

(Or)


(b)     Explain how  t:o reduce   branch   cost with  dynamic hardware  prediction.


12.     (a)      Explain how hardware  support   for exposing  more  parallelism at  compile time.

(Or)


(b)      Explain  how  hardware   based   speculation  is  use to  overcome  control dependence.



13.
(a)
Discuss  about  the  different models  for memory  consistency.

 (Or)



(b)

Define  synchronization  and  explain   the  different mechanisms for synchronization among  processors.

employed

14.

(a)

Explain the various  levels  of RAID.

 (Or)
(b)      Explain the various  ways  to measure 1/0 performance.



·      15.    (a)      How is multithreading  used  to exploit  thread   level  parallelism within  a processor?  Explain with  example.             ·
 (Or)




(b)     Discuss  SMT and  CMP architectures in detail.










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