UNIT – I
PART-A
1.What is cache memory?
The small and fast RAM units are called as caches.when the execution of an
instruction calls for data located in the main memory,the data are fetched and a copy is
placed in the cache.Later if the same data is required it is read directly from the cache.
2.What is the function of ALU?
Most of the computer operations(arithmetic and logic) are performed in ALU.The
data required for the operation is brought by the processor and the operation is performed
by the ALU
3.What is the function of CU?
The control unit acts as the nerve center,that coordinates all the computer
operations. It issues timing signals that governs the data transfer.
4.What are the basic functional units of a computer?
A computer consists of five functionally independent main parts namely
Input Unit
Memory Unit
Arithmetic and logic Unit
Output Unit
Control Unit
5.What are the registers generally contained in the processor?
MAR-Memory Address Register
MDR-Memory Data Register
IR-Instruction Register
R0-Rn-General purpose Registers
PC-Program Counter
6.What are the steps in executing a program?
1.Fetch
2.Decode
3.Execute
4.Store
7.Define interrupt and ISR?
An interrupt is a request from an I/O device for service by the processor. The processor provides the requested service by executing the interrupt service routine
8.Define Bus?
A group of lines that serves as a connecting path for several devices is called a
bus.
9.What is the use of buffer register?
The buffer register is used to avoid speed mismatch between the I/O device and
the processor
10.Compare single bus structure and multiple bus structure?
A system that contains only one bus(i.e only one transfer at a time) is called as a
single bus structure. A system is called as multiple bus structure if it contains multiple
buses.
11.What is System Software? Give an example?
It is a collection of programs that are executed as needed to perform functions
such as
o Receiving and interpreting user commands
o Entering and editing application programs and storing them as files in secondary storage devices.
Ex: Assembler, Linker, Compiler etc
12.What is Application Software? Give an example?
Application programs are usually written in a high- level programming language,
in which the programmer specifies mathematical or text-processing operations. These
operations are described in a format that is independent of the particular computer used to
execute the program.
Ex: C, C++, JAVA
13.What is a compiler?
A system software program called a compiler translates the high- level language
program into a suitable machine language program containing instructions such as the
Add and Load instructions
14.What is text editor?
It is used for entering and editing application programs. The user of this program
interactively executes command that allow statements of a source program entered at a
keyboard to be accumulated in a file.
15.Discuss about OS as system software?
OS is a large program,or actually a collection of routines,that is used to control individual application programs.
16.What is multiprogrraming or multitasking?
The operating system manages the concurrent execution of several application
programs to make the best possible uses of computer resources.this pattern of
concurrent execution is called multiprogrraming or multitasking.
17.What is elapsed time of computer system?
The total time to execute the total program is called elapsed time.it is affected by
the speed of the processor,the disk and the printer.
18.What is processor time of a program?
The periods during which the processor is active is called processor time of a
programIt depends on the hardware involved in the execution of individual machine instructions.
19.Define clock rate?
The clock rate is given by,
R=1/P,where P is the length of one clock cycle.
20.Write down the basic performance equation?
T=N*S/R
T=processor time
N=no of instructions
S=no of steps
R=clock rate
21.Compare RISC with CISC architecture
22.What is byte addressable memory?
The assignment of successive addresses to successive byte locations in the
memory is called byte addressable memory
23.What is big endian and little endian format?
The name big endian is used when lower byte addresses are used for the more significiant of the word.The name little endian is used for the less significiant bytes of
theword.
24.What is branch target?
As a result of branch instructions , the processor fetches and executes
25.What are condition code flags?
The processor keep track of information about the results of various
operations for use by subsequent conditional branch instructions. This is
accomplished by recording the required information in individual bits, often called condition code flags.
26.Define addressing mode.
The different ways in which the location of an operand is
specified in an instruction are referred to as addressing modes
27.Define various addressing modes.
The various addressing modes are
1.Absolute addressing mode
2.Register addressing mode
3.Indirect addressing mode
4.Index addressing mode
5.Immediate addressing mode
6.Relative addressing mode
7.Autoincrement addressing mode
8.Autodecrement addressing mode
28.What is a pointer?
The register or memory location that contains the address of an
operand is called a pointer.
29.What is index register?
In index mode the effective address of the operand is generated by
adding a constant value to the contents of a register. The register used may be either a special register or may be any one of a set of general purpose registers in
the processor. This register is referred to as an index register.
30.What is assembly language?
A complete set of symbolic names and rules for the use of
machines constitute a programming language, generally referred to as an
assembly language.
31.What is assembler directive?
SUM EQU 200
Assembler directives are not instructions that will be executed .It
simply informs the assembler that the name SUM should be replaced by the
value 200 wherever it appears in the program, such statements are called as
assembler directives.
32.What is loader ?
Loader is a system software which contains a set of utility
programs. It will load the object program to the memory.
33.Define device interface.
The buffer registers DATAIN and DATAOUT and the status flags
SIN and SOUT are part of circuitry commonly known as a device
interface.
34.What is indirect addressing mode?
The effective address of the operand is the contents of a register or memory location whose address appears in the instruction
35.What is indexed addressing mode?
The effective address of the operand is generated by adding a constant value to the contents of a register.
36.Define autoincrement mode of addressing?
The effective address of the operand is the contents of a register specified in the instruction. After accessing the operand, the contents of this register are
automatically incremented to point to the next item in the list
37.Define autodecrement mode of addressing?
The contents of a register specified in the instruction are first automatically decremented and are then used as the effective address of the operand.
38.What are condition code flags? What are the commonly used flags
The processor has to keep track of the information about the results of various operations for the subsequent conditional branch instructions. This is done by
recording required information in individual bits called condition code flags.
Four commonly used flags are:
N( Negative )
Z(Zero)
V(overflow)
C(Carry
39.What do you man by relative addressing mode?
The effective address is determined by the index mode using the program
counter in place of the general purpose register Ri.
PART-B
1.Explain the various addressing modes.
Register mode
Absolute mode
Immediate mode
Indirect mode
Indexed mode
Relative mode
Auto increment mode
Auto Decrement mode
2.Discuss the following:
(i)Basic operational concepts of a computer.
Instructions
Operational details of a processor
Registers
Operating steps
(ii) Basic instruction types.
Zero address instruction
One address instruction
Two address instruction
Three address instruction
3.Discuss in detail the various measures of performance of a computer
Processor clock
Pipelining and super scalar operation
Clock rate
Instruction set
Compiler
4.Discuss the following:
Execution steps
Diagram
(ii) Branching.
Explanation
Diagram
5.Explain in detail the data transfer between the memory & I/O unit.
Program controlled I/O
Flags(SIN, SOUT)
Buffers(DATAIN, DATAOUT)
Coding
Diagram
6.Explain the various functional units of a computer
Input unit
Output Unit
ALU
CU
MU
UNIT II
1.Differentiate Hardwired and Micro programmed control?AU APRIL 2004
Hardwired control is implemented using nano-instructions. It is difficult to handle large/complex instruction sets. It is a complicated one.
Micro programmed control is implemented in software using microinstructions. It is easier to handle. It is an orderly and systematic one.
2.Give the applications of Microprogramming? AU APRIL 2003
Realization of computers
Emulation
O.S. support
Realization special purpose devices
High level language support
Micro diagnostics
User tailoring
3.Enumerate the advantages of Microprogramming? AU NOV/DEC 2003
• Implement control unit of a computer
• Provides well structured computer organization
• Adaptable to changes
• Simplifies the documentation and training service of the system
• Simulation is possible
• More efficient that software and more flexible than hardware in many applications.
4.Write the disadvantages of Microprogramming?
• Too costly
• Use of control memory may decrease the speed of computer
• Requires a diagnostic package of routines for checking, locating and isolating hardware malfunctions.
5.Write about Horizontal microinstruction?[AU Nov 2006]
Long formats
Ability to express a high degree of parallelism
Little encoding of the control information
Useful when higher operating system is desired
Specify many micro-operations
Existence of a long control word that produces a horizontal pattern of 1’s and 0’s
Efficient hardware utilization
Makes control memory very expensive.
Eg. IBM System/360 Model 50
6.Write about Vertical microinstruction?
Short formats
Limited ability to express parallel microinstructions
Considerable encoding of the control information
Slower operating speeds
Specify only one micro-operation
Saves memory space
Needs decoding circuits external to the control memory
Eg. IBM System/370 Model 145
7.What is called Nanomemory? AU NOV/DEC 2003
Nanomemory is derived from a combination of horizontal and vertical microinstruction. It offers significant savings in space when a group of micro-operations occur
many times in a micro-program. It directly controls the hardware. It contains nano-instructions.
8.Give the advantage and disadvantage of Nano-memory?
ADVANTAGE – Reduce total size of required control memory and greater design flexibility.
DISADVANTAGE – Loss of speed due to extra memory access required for nano control memory
9.Give the steps involved in Hardwire Control Design? AU APRIL 2003
i. Define the task to be performed.
ii. Purpose a trial processing section.
iii. Provide a register transfer description of the algorithm based on the processing section outlined in the previous step.
iv. Validate the algorithm by using trial data.
v. Describe the basic characteristics of the hardware elements to be used in the processing section.
vi. Complete the design of the processing section by establishing necessary control points
vii. Propose a block diagram of the controller.
viii. Specify the state diagram of the controller.
ix. Specify the hardware characteristics of the hardware elements to be used in the controller.
x. Complete the controller design and draw a logic diagram of the final circuit.
10.Define the terms: AU APRIL 2005
Microprogrammed control unit, Microinstruction & Microprogram.
A control unit whose micro-operations are stored in a memory is called a microprogrammed control unit.
Each control word of memory is called a microinstruction.
A sequence of control words is called microprogram
11.Define Microprogramming?
It is a concept of execution and reading microinstructions from ROM inside the control unit.
12.What is a Control Memory?[ AU Nov 2007]
A read-only memory or a writable control memory when used in the control unit of a computer is referred to as a control memory.
13.What is called a Control Word?
The string of 1’s and 0’s is called a control word.
14.What are the Address sequencing capabilities required in a Control memory?
I. Incrementing of the control address register.
II. Unconditional branch as specified by the address field of the microinstruction.
III. Conditional branch depending on status bits in the registers of the computer.
IV. A mapping process from the bits of the macro-operations to the required bits of a ROM address.
V. A facility for subroutine calls and returns.
15.What is a PLA?
The mapping memory is sometimes implemented by means of an integrated circuit called programmable logic array (PLA). A PLA is similar to ROM in concept except that it
uses internal AND and OR gates instead of a decoder.
16.Give the Microinstruction Format?[AU Nov 2008]
3 3 3 2 2 7
Micro-ops
F1 : Specify micro-operations.
F2 : Specify micro-operations.
F3 : Specify micro-operations.
CD : Selects status bit conditions.
BR : Specifies the type of branch.
ADF : Contains an address.
17.What are the two parts of a Micro program Control Unit?
a.Control memory.
b.Micro program sequencer.
18.What is the purpose of a Micro program Sequencer?
The address-generation part is called a micro program sequencer, since it sequences the microinstructions in control memory. The purpose of a micro program sequencer
is to present an address to the control memory so that a microinstruction may be read and executed.
19.Give the Control word format for a bus organized CPU?[AU April 2007]
LB – Specifies the register to be connected to the left bus of ALU.
RB – Specifies the register to be connected to the right bus of ALU.
DB – Specifies the register where the result is to be transferred.
FU – Specifies an ALU function.
SH – Specifies a shift function.
20.What is dynamically programmable processor?
A processor with a writable control memory is said to be dynamically micro programmable because the control memory contents can be altered under program
control.
21.State the systematic method of encoding the control signals.
A systematic method of encoding is to divide the control signals into sets that are compatible in the sense that no two members of set called a compatibility
class, are active at the same time.
22.What is called encoding by function?
An encoded format in which each control field specifies the control signals for one component or fro a related set of operations is called encoding by
function. Here each component has its own set of functions.
23.What are the three components from which a control unit can be constructed?
A control unit can be constructed from three components. A RAM or ROM used as the control memory, a microinstruction register and a micro program sequencer.
24.Define micro program sequencer.
It is possible to place all the circuitry needed to generate microinstruction addresses in single IC or cell called a micro program sequencer. A micro program
sequencer is a general-purpose building block for micro programmed control units. It contains a micro program counter MPC,as well as the logic needed for conditional
branching and transferring control between micro programs.
25.What is called writable control memory and state the use of such a memory?
The control memory CM made of RAM is called a writable control memory. It allows us to change a processors instruction set by changing the micro programs that
interpret the instruction set.
26.What is Data path?
The register, ALU and the inter connecting bus or collectively referred. to as the data path
27.What is program counter?[ AU Nov 2008]
The processor keeps track of the address of the memory location containing the text instruction to be fetched using the program counter.
PART-B
1.Explain the fundamental concept in Basic Processing unit[AU Nov 2006,2008]
2.Explain Single Bus Organization with neat diagram?
3.Explain Multiple Bus Organization with neat diagram?[AU Nov 2003]
4.Explain the Hardwired Control unit with neat diagram.[AU Nov 2003,2007]
5.Explain the Micro programmed Control unit organization with neat diagram.[AU April2008]
6.Compare Hardwired control unit and micro programmed control unit. [AU Nov/Dec 2007]
7.Explain the techniques for modification or generation of Branch address
8.Explain the Execution of a complete instruction with example.[AU Nov 2008]
9.Explain the techniques for grouping of control signals.Page No: 224
UNIT - 3
1.What are the major characteristics of a pipeline?
The major characteristics of a pipeline are:
a) Pipelining cannot be implemented on a single task, as it works by splitting multiple tasks into a number of subtasks and operating on them simultaneously.
b) The speedup or efficiency achieved by suing a pipeline depends on the number of pipe stages and the number of available tasks that can be subdivided.
c) If the task that can be subdivided has uneven length of execution times, then the speedup of the pipeline is reduced.
d) Though the pipeline architecture does not reduce the time of execution of a single task, it reduces the overall time taken for the entire job to get completed.
2.What is a pipeline hazard?
Any condition that causes the pipeline to stall is called hazard. They are also called as stalls or bubbles.
3.What are the types of pipeline hazards?
The various pipeline hazards are:
1. Data hazard
2. Structural Hazard
3. Control Hazard
4.What is data hazard?
Any condition in which either the source or the destination operands of an
instruction are not available at the time expected in the pipeline is called data hazard.
5.What is Instruction or control hazard?
The pipeline may be stalled because of a delay in the availability of an instruction.
For example, this may be a result of a miss in the cache, requiring the instruction to be fetched from the main memory. Such hazards are often called control hazards
or instruction hazard
6.What is side effect?
When a location other than one explicitly named in an instruction as a destination operand is affected, the instruction is said to have a side effect.
7.What do you mean by branch penalty?
The time lost as a result of a branch instruction is often referred to as branch penalty.
8.What is branch folding?
When the instruction fetch unit executes the branch instruction concurrently with the execution of the other instruction, then this technique is called branch
folding.
9.What do you mean by delayed branching?
Delayed branching is used to minimize the penalty incurred as a result of
conditional branch instruction. The location following the branch instruction is called delay slot. The instructions in the delay slots are always fetched and they are
arranged such that they are fully executed whether or not branch is taken. That is branching
takes place one instruction later than where the branch instruction appears in the instruction sequence in the memory hence the name delayed branching.
10.What are the two types of branch prediction techniques available?
The two types of branch prediction techniques are
1) Static branch prediction
2) Dynamic branch prediction
11.Define pipelining.
Pipelining is an effective way of organizing concurrent activity in a
computer system. The processor executes the program by fetching and
executing instructions, one after the other.
12.Name the four steps in pipelining.
Fetch: read the instruction from the memory.
Decode: decode the instruction and fetch the source operand.
Execute: perform the operation specified by the instruction.
Write: store the result in the destination location.
13.What are called stalls?
An alternative representation of the operation of a pipeline in the
case of a cache miss gives the function performed by each pipeline stage
in each clock cycle. The periods in which the decode unit, execute unit,
and the write unit are idle are called stalls. They are also referred to as
bubbles in the pipeline.
14.What is structural hazard?
Structural hazard is the situation when two instructions require the
use of a given hardware resource at the same time. The most common case in which this hazard may arise is in access to memory.
15.What is dispatch unit?
A separate unit which we call the dispatch unit, takes instructions
from the front of the queue and sends them to the execution unit. The
dispatch unit also performs the decoding function.
16.Define speculative execution.
Speculative execution means that instructions are executed before
the processor is certain that they are in the correct execution sequence.
Hence, care must be taken that no processor registers or memory locations are updated until it is confirmed that these instructions should indeed be all their
associated data in the execution units must be purged , and the correct instructions fetched and executed.
17.What is called static and dynamic branch prediction?
The branch prediction decision is always the same every time a
given instruction is executed. Any approach that has this characteristic is
called static branch prediction. Another approach in which the prediction
decision may change depending on execution history is called dynamic
branch prediction.
18.What are condition codes?
In many processors, the condition code flags are stored in the
processor status register. They are either set or cleared by many
instructions, so that they can be tested by subsequent conditional branch
instructions to change the flow of program execution.
19.What are superscalar processors?
Several instructions start execution in the same clock cycle, and
the processor is said to use multiple issue. Such processors are capable of
achieving an instruction execution throughput of more than one instruction per cycle. They are known as superscalar processors.
20.What is a deadlock/
A deadlock is a situation that can arise when two units, A and B,
use a shared resource. Suppose that unit B cannot complete its task until
unit A completes its task. At the same time, unit B has been assigned a
resource that unit A needs. If this happens, neither unit can complete its
task. Unit A is waiting for the resource it needs, which is being held by
unit b. at the same time, unit B is waiting for unit A to finish before it can
release that resource.
PART-B
1.Give the basic organization of a Microprogrammed control unit.Draw a flowchart of a micro routine for the instruction Add src, Rdst.
Diagram for basic organization Flowchart for Add Src, Rdst
2.Draw the organization of a single-bus processor and give the control sequences for fetching a word from memory, storing a word in memory , executing a complete
instruction and unconditional and conditional branch.
3.Explain the basic organization of a Hardwired control unit. Mention its advantages and disadvantages.
Diagram for basic organization
Explanation
Advantages
Disadvantages
4.Explain the various types of hazards in pipelining?
Instruction hazard
Data hazard
Structural hazard
Control hazard
5.Write notes on super scalar operation?
Explanation
Diagram
UNIT - 4
1.1Why is Associative Memory expensive than RAM?
Associative memory is expensive than RAM since each cell must have storage capacity as well as logic circuits for matching its content with an external argument.
2.What is meant by a Mapping procedure?
A mapping procedure is a rule that transforms the macro-operation into a ROM address. Normally the mapping function converts the bits of the instruction code to a
control memory address.
3.Define Memory Access Time? AU APRIL 2003
It is the time taken by the memory to supply the contents of a location, from the time, it receives “READ
4.Define Memory Cycle Time? AU NOV/DEC 2006
Memory cycle time = Memory access time + Additional recovery time
5.Define Bus Arbitration? AU NOV/DEC 2003
If several units can generate requests for bus access simultaneously, bus master needs a way to select one of the unit; this selection process is called bus
arbitration.
6.What is meant by Memory interleaving? AU APRIL 2008
Memory interleaving is a process of partitioning the memory into separate modules, which are independent of each other. A memory module is a memory array together with
its own address and buffer registers. In an interleaved memory, consecutive addresses are assigned to different memory modules.
7.What is called Emulation?
The simulation of the instruction set of one computer in another computer is called emulation. By changing the micro program it is possible to emulate one computer in
another.
8.Differentiate Main memory and Auxiliary memory?
The memory unit that communicates directly with the CPU is called the main memory.
Devices that provide backup storage are called auxiliary memory.
9.List the various semiconductor RAMs?
i] Static RAM.
ii] Dynamic RAM.
10.Define Memory Bandwidth?
Memory bandwidth is defined as the average number of words accessed per second.
11.What is called Memory management system?
The part of the operating system that supervises the flow of information between all storage devices is called the memory management system.
12.What is the Objective of the Memory Management System ?
The memory management system is used to adjust the frequency with which the various memories are referenced to provide an efficient method of transfers between levels
so as to minimize the utilization of all computer components.
13.What is an Associative Memory?[AU Nov 2008
The memory in which the stored data can be identified for access by the content of the data itself rather than by an address is called an associative memory or content
addressable memory.
14.What is an Associative Processor?
A computer with an associative memory instead of a random-access memory is called an associative processor.
15.What is meant by Virtual Memory?[AU Nov 2007
Virtual memory is a concept used in some large computer systems that permit the user to construct his programs as though he had a large memory space, equal to the
totality of auxiliary memory.
16.Define Virtual address, Address space, Physical address and Memory space?
An address used by a programmer will be called a virtual address. The set of such addresses is called the address space. An address in main memory is called a location
or physical address. The set of such locations is called the memory space.
17. What is called Page Fault?
When a program starts execution, one or more pages are transferred into main memory and the page table is set to indicate their positions. The program is executed from
main memory until it attempts to reference a page that is still in auxiliary memory. This condition is called page fault.
18.Define Hit and Miss?
The performance of cache memory is frequently measured in terms of a quantity called hit ratio. When the CPU refers to memory and finds the word in cache, it is said
to produce a hit. If the word is not found in cache, then it is in main memory and it counts as a miss.
19.Differentiate Write-through method and Write-back method?
The simplest procedure to update main memory with every memory write operation, with cache memory being updated in parallel if it contains the word at the specified
address is called the write-through method.
In write-back method, the cache location is updated during a write operation. The location is then marked by a flag so that later when the word is removed from the
cache it is copied into main memory.
20.What is the mapping procedures adopted in the organization of a Cache Memory?
i) Associative mapping.
ii) Direct mapping.
iii) Set-associative mapping.
21.Differentiate Cache Memory and Virtual Memory?AU APRIL 2004
Cache Memory Virtual Memory
Replacement is primarily controlled by the hardware. Replacement is primarily controlled by O.S.
Cache size is independent of the address apace. Number of bits in the address determined the size of virtual memory.
Transfer of information between main memory and CPU. Data transfer between main memory and auxiliary memory.
22.State the property “LOCALITY Of REFERENCE”?
Locality of reference states that “Over a short interval of time, the addresses generated by a typical program, refer to a few localized areas of memory repeatedly
while the remainder of memory is accessed relatively infrequently”.
23.Define Throughput?
Throughput is defined as a number of operations performed per unit time.
24.Enumerate the Processor Characteristics for Multiprocessing?
a) Process recoverability.
b) Efficient context switching.
c) Large virtual & physical address space.
d) Efficient synchronization primitives.
e) Interprocess communication mechanism.
f) Instruction set.
25.Define Multiprogramming?
Multiprogramming refers to the existence of many programs in different parts of main memory at the same time.
26.What are the different methods of memory access?
The different methods of memory access are,
a) Sequential: Memory is organized into units of data called records. A tape drive is an example of sequential access memory.
b) Random access: Each addressable location in memory has unique address. It is possible to access any memory location at random.
27.What are the three parameters that are used to determine the performance of the memory system?
The performance of the memory system is determined using the following three parameters.
a) Access time
b) Memory cycle time
c) Transfer rate
28.How is the stored data in EPROM erased?
Exposing the chip to ultraviolet light through the quartz window for 15 to 20 minutes can erase the stored data in EPROM.
29.What is segmentation and segment translation?
The linear base address form the descriptor and is then added to the 32 bit offset to generate 32 bit linear address. This process is known as segmentation.
Segment translation is a process of converting logical address into linear addresses.
PART - B
1i)Discuss in the different types of mapping techniques used in cache memories. (univ may 2005) Page no:314-329
Direct mapping
Associative mapping
Set Associative mapping
2.Discuss any one virtual memory management techniques. (univ nov 2004) Page no:337-343
Address Translation
Diagram
Explanation
3.Draw and explain different cache memory organization.(univ may 2006) Page no:314-329
ii)Descried the virtual-memory address translation techniques.(univ nov 2007) Page no:337-343
4.Explain in detail about semiconductor RAM memories. Page no:295-309
5.Explain in detail about read-only memories. Page no:309-313
ROM
PROM
EPROM
EEPROM
Flash
6.Explain in detail about secondary storage. .(univ nov 2004) Page no:344-359
Magnetic hard disks
Floppy diska
Optical
DVD
Magnetic tape systems
7.Explain in detail about performance consideration (univ nov 2003) . Page no:329-337
8.Discuss in detail about multiple bus organization. (univ NOV 2007) Page no:425-429
9.Explain in detail data and control consideration. Page no:479-481
10.Discuss in detail about performance of a pipeline. Page no:458-461
UNIT - 5
1.Give the function of a Data Communication Processor?
A data communication processor supervises the transfer of information between a computer and many remote terminals.
2.Differentiate DMA and IOP?
DMA – Has no instructions.
IOP – Has its own instructions.
3.What are called Peripherals? AU NOV/DEC 2003
Devices that are under the direct control of the processor are said to be connected on-line. A device is off-line when it is operated independently of the computer.
Input or output devices attached to the computer on-line or available off-line are called peripherals.
4.What is an I/O Interface?
Input-output interface provides a method for transferring binary information between internal storage, such as memory and CPU registers, and external I/O devices.
5.Give the I/O Instruction Code Format? AU NOV/DEC 2003
Op. code – Distinguishes the instruction as an I/O type.
Device address – Specify up to 16 peripherals.
Function code – Specifies the command for the I/O interface.
6.What are the commands issued by the computer through the Function code bits?
i.Control command – Activate the peripheral and to inform it what to do.
ii.Test command – Test various status conditions in the interface or the peripheral.
iii.Data-output command – Causes the interface to respond by taking an item of data from the data lines in the I/O bus.
iv.Data-input command – Causes the interface to receive an item of data from the peripherals and places it in its buffer register.
7.Differentiate Isolated I/O and Memory mapped I/O?
In isolated I/O, the microprocessor has distinct input and output instructions, and each of these instructions is associated with the address of an interface
register. It specify separate memory-read and memory-write operations.
In Memory mapped I/O, there are no specific input or output instructions. The CPU can manipulate I/O data residing in interface registers with the same
instructions that are used to manipulate memory words i.e. the same set of instructions are used for reading and writing memory can be used to input and output data.
8.What are the three modes of data transfer between the computer and peripherals?
i.Data transfer under program control.
ii.Interrupt initiated data transfer.
iii.Direct Memory Access transfer.
9.Define DMA?
Direct Memory Access is an interface that provides I/O interface of data directly to and from the memory and peripheral. The actual transfer of data is done directly
between peripheral and the memory unit through the DMA, freeing the CPU for some other tasks.
10.What do you mean by Cycle Stealing?
The data transfer is done in the DMA interface by first checking if the memory unit is not used by the CPU and then the DAM steals one memory cycle to access a word in
memory. This process is known as cycle stealing.
11.Differentiate Vectored and No vectored Interrupt?
In a vectored interrupt, the interrupting source itself supplies the branch information (interrupt vector) to the processor.
In a nonvectored interrupt, the branch address is assigned to a fixed location in memory.
12.What is a Priority Interrupt?
A priority interrupt is an interrupt that establishes a priority over the various sources to determine which condition is to be serviced first when two or more
requests arrive simultaneously.
13.Give the usage of polling procedure?
A polling procedure is used to identify the highest-priority source by means of software. There is one common branch address for all interrupts
14.What is the Disadvantage of using the Polling procedure?
If there are many interrupts, the time required to poll them can exceed the time available to service the I/O device. In this situation, hardware priority interrupt
unit can be used to speedup the operation.
15.Give the command word format for an I/O Processor? AU APRIL 2003
Buffer address – Specifies a memory address for the beginning of a buffer area in memory.
Word count – Indicates the length of the buffer i.e. the number of words it contains.
Operation code – Specifies the operation to be performed.
Special code – Specifies a particular function and is different for each I/O device.
16.Define I/O Channel?
The I/O processor in the IBM-370 computer is called an I/O channel.
17.Give the Channel status word format?
Key – Protection mechanism used to prevent unauthorized access by one user to information that belongs to another user or to the
operating system.
Address – Address of the last command word used by the channel.
Status – Identifies the conditions in the device and the channel and any errors that occurred during the transfer.
Count – Show zero if the transfer is completed successfully.
18.Give the Channel command word format? AU APRIL 2004
Command code – Specifies an I/O operation [Write, Read, Read backwards,Control, Sense, Transfer in channel].
Data address – Specifies the first address of a memory buffer.
Count – Gives the number of bytes involved in the transfer.
Flags – Provide additional information for the channel
19.Differentiate I/O Processor and Data Communication Processor?
An I/O processor communicates with the peripherals through a common I/O bus that is comprised of many data and control lines.
A data communication processor communicates with each terminal through a single pair of wires.
20.What are the two types of communication in transferring information among the units of a computer? AU NOV/DEC 2003
The two types of communication are,
a) Intrasystem communication, which occurs within a single computer system and involves information transfer over distances of less than a meter.
b) Intersystem communication, which can involve communication over much longer distances.
21.How is the difference between the CPU and peripherals resolved?AU NOV/DEC 2003
To resolve the differences computer systems include special hardware components between the CPU and peripherals to supervise and synchronies all input and
output transfers. These components are interface units because they interface between the processor bus and peripheral device. In addition, each device may have its
own controller that supervises the operations of the particular mechanism in the parallel.
22.What are the four types of commands that an interface may receive?
The four types of commands that an interface may receive are.
a) Control command
b) Status command
c) Data output command
d) Data input command
23.How the distinction is made between memory transfer and i/O transfer?
The distinction between a memory transfer and I/O transfer is made through separate read and write lines. The CPU specifies whether the address on the address
lines is for a memory word or for an interface register by enabling one of two possible read or write lines. The I/O read and I/O write control lines are enabled during an I/O transfer. The memory read and writes control lines are enabled during a memory transfer.
24.Mention the disadvantages of the strobe method.
The disadvantages of the strobe method are that the source unit that initiate the transfer has no way of knowing whether the destination unit has actually
received the data item was placed in the bus. Similarly,a destination unit that initiates the transfer has no way of knowing whether the source unit that has actually
placed the data on the bus.
25.What are the possible modes used to handle data transfer to and from the peripherals?AU APRIL 2004
Date transfer to and from peripherals may be handled in three possible modes. They are
a) Programmed I/O
b) Interrupt initiated I/
c) Direct memory access.(DMA)
26.State the limitations of programmed I/O method.
The limitations of programmed I/O method are,
a) the speed with which the CPU can test and service I/O devicel limits and I/O data transfer rates.
b) The time that the CPU spends for testing I/O device.
27.List out the steps taken by a CPU to handle an interrupt.
The steps taken by a CPU are.
a) The CPU identifies the source of the interrupt, for example by polling I/O device.
b) The CPU controls the memory address of the requires interrupt handler. The interrupting device along with its interrupt request can provide this address.
c) The program counter PC and other CPU status information are retrieved during a subroutine call.
d) The PC is loaded with the address handler. Execution proceeds until a return instruction is encountered, which transfers control back to the interrupted
program.
28.What are the three registers of DMA controller? AU APRIL 2004
The DMA controller has three registers. They are
a) The address register, which contains an address to specify the desired location in memory.
b) The control register, which specifies the mode of operation.
c) The word register holds the number of words to be transferred
29.What are the two handshaking lines?
The two handshaking lines are,
a)Data valid which is generated by the source unit.
b)Data accepted generated by the destination unit.
PART -B
1.Discribe the method of data transfer from output device through DMA to CPU.(univ nov 2004) Page no:234-247
2.With neat diagram explain the IOP organization.(univ nov 2005) Page no:259-272
3.Draw the block diagram of DMA controller and explain its working principles.(univ may 2006)
4.write notes on interrupts.(univ nov 2004)
Vectored interrupt
Interrupt nesting
Simultaneous requests
5.Explain In detail about interface circuits(univ may 2003)
Explanation
Diagram
6.Explain in detail about standard I/O interface.
7.Discuss in detail about multiple bus organization. (univ NOV 2004)
8.Explain in detail data and control consideration
9.Discuss in detail about performance of a pipeline.
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