Monday 6 April 2015

CS 2354/CS 64/10144 CS 604 - ADV AN CED COMPUTER ARCHITECTURE

Question Paper Code:  21315

B.E./B.Tech.   DEGREE EXAMINATION,  MAY/JUNE  2013.

COMPUTER SCIENCE AND ENGINEERING

CS 2354/CS  64/10144  CS 604 -·ADV AN CED COMPUTER  ARCHITECTURE 

 (Regulation   2008/2010) SIXTH SEMESTER
Time  :  Three  hours                                   Maximum:   100.marks



1.       Define  Dynamic scheduling.


2.       List  the five levels of branch  prediction.


3.       Define loop -  carried  dependence.


4.      What  is major  disadvantages of supporting speculation  Hardware.


5.      What  arc the disadvantages  of using  symmetric shared  memory?


6.        What  is consistency?


7.       What  is cache  miss  and  cache  hit?


8.       What  is the bus  master?


9.      What  are  the categories of multiprocessors?             ..
10.     What  is fine grained  multithreading? 

PART B-(5x16      = 80 marks)

11.    (a)     What  is instruction-level parallelism? Explain  in detail  about  the various
dependences caused   in ILP.

(Or)


(b)     Explain how  t:o reduce   branch   cost with  dynamic hardware  prediction.


12.     (a)      Explain how hardware  support   for exposing  more  parallelism at  compile time.

(Or)


(b)      Explain  how  hardware   based   speculation  is  use to  overcome  control dependence.



13.
(a)
Discuss  about  the  different models  for memory  consistency.

 (Or)



(b)

Define  synchronization  and  explain   the  different mechanisms for synchronization among  processors.

employed

14.

(a)

Explain the various  levels  of RAID.

 (Or)
(b)      Explain the various  ways  to measure 1/0 performance.



·      15.    (a)      How is multithreading  used  to exploit  thread   level  parallelism within  a processor?  Explain with  example.             ·
 (Or)




(b)     Discuss  SMT and  CMP architectures in detail.










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